🛠 Capes historiques : capemanager, EEPROM d'identification et pièges des broches

Objectives

Understand the cape ecosystem that built the BBB's reputation: two 46-pin headers, stackable up to 4 levels, with each cape carrying an identification EEPROM (I2C addresses 0x54 to 0x57) read at boot to configure the pinmux. You will work with the legacy capemanager (/sys/devices/platform/bone_capemanager/slots) found on older images, its modern configfs equivalent, and the three hardware pitfalls of the SRM: SYSBOOT pins on P8, eMMC on the GPMC pins, and HDMI framer back-powering.

Hardware

• 1 BeagleBone Black (revisions A6/A6A fixed reset glitches and a 1-in-20 boot failure — useful to know when buying used)
• 1 official cape or a homemade cape on a breadboard
• device-tree-compiler packages

Full code

# 1. Lire l'EEPROM d'une cape branchée (bus I2C2, adresses 0x54-0x57)
sudo i2cdump -y 2 0x54 b     # nom et pinmux de la cape en ASCII

# 2. Images anciennes (capemanager U-Boot) : lister et activer un slot
cat /sys/devices/platform/bone_capemanager/slots
dtc -O dtb -o macape-00A0.dtbo -b 0 -@ macape.dts
sudo cp macape-00A0.dtbo /lib/firmware/
echo macape:00A0 | sudo tee /sys/devices/platform/bone_capemanager/slots

# 3. Images modernes : configfs (le capemanager a disparu des noyaux récents)
sudo mkdir -p /sys/kernel/config/device-tree/overlays/macape
cat macape-00A0.dtbo | sudo tee /sys/kernel/config/device-tree/overlays/macape/dtbo
ls /sys/kernel/config/device-tree/overlays/

# 4. Traces de lecture de l'EEPROM au boot
sudo dmesg | grep -iE "cape|eeprom|slot"

Expected verification

With an official cape, dmesg displays the name of the capedriver loaded automatically (EEPROM read). A custom overlay appears in slots (older image) or in configfs (recent image), and the device it describes becomes visible under /sys/devices/platform or /sys/bus.

Common errors

• Driving P8_27 to P8_46 from a cape: these are the SYSBOOT pins (LCD bus and HDMI framer inputs); a signal present before SYS_RESETn rises changes the boot order and the board fails to start (SRM ch.8).
• Using the GPMC pins shared with the eMMC: 10 pins on P8 are captured by the eMMC; without keeping it in reset, the bus is inaccessible.
• Powering a 5 V cape from the board's USB: when powered via USB, the VDD_5V rail on the headers is ABSENT (only SYS_5V derived from the PMIC exists) and USB is limited to 500 mA.
• Looking for bone_capemanager on a recent kernel: it no longer exists, switch to configfs or embedded overlays.
• Back-powering: injecting 5 V into the HDMI framer pins powers it in reverse and can damage the board (SRM ch.7 warning).