🛠 Console série et JTAG du CM5 : l'empreinte de debug JST-SH et les points de test

Objectives

The CM5 is the first Compute Module designed for debugging without a full carrier board: the datasheet (Appendix A) describes a 3-pin JST-SH debug UART footprint with a 1 mm pitch (connector reference BM03B-SRSS-TB), repeated TX/RX test points (TP35/TP36), JTAG test points, and power and USB boot pads on test points to flash a module without using the 2 × 100-pin connectors. This tutorial covers outputting the kernel console to this UART, capturing the full boot log, and laying the groundwork for JTAG debugging.

Hardware

• 1 × CM5 (on a CM5IO or flying leads on debug pads)
• 1 × USB ↔ UART converter at the logic level of the used GPIO bank (3.3 V here) — never power the target from the converter if the board is already powered
• Wiring: TX (module) → RX (adapter), RX ← TX, common ground; JST-SH connector or pins on TP35/TP36
• sudo apt install -y picocom openocd (OpenOCD for the JTAG part)

Complete code

# --- Côté CM5 : activer la console série ---
sudo tee -a /boot/firmware/config.txt >/dev/null <<'EOF'
enable_uart=1
cmdline=console=serial0,115200 console=tty1
EOF
sudo reboot

# --- Côté hôte : capturer le boot complet ---
sudo apt install -y picocom
picocom -b 115200 /dev/ttyUSB0          # log de boot puis shell
# (sous minicom : minicom -D /dev/ttyUSB0 -b 115200)

# --- Vérifier le console déclarée par le noyau ---
cat /proc/cmdline
cat /sys/class/tty/ttyAMA0/device/driver/driver 2>/dev/null || true

# --- Base JTAG (points de test de l'Annexe A) avec un adaptateur CMSIS-DAP ---
cat > /tmp/jtag.cfg <<'EOF'
adapter driver cmsis-dap
transport select jtag
target extended-memory-access enabled
EOF
sudo openocd -f /tmp/jtag.cfg -c 'init; halt; reg pc; resume; shutdown'

Expected verification

On the terminal at 115200 baud, the firmware scrolls by followed by kernel messages (console=serial0,115200 in /proc/cmdline), and a login prompt appears — the serial console works even when HDMI/SSH are down. OpenOCD halts the Cortex-A76 and then resumes without errors, proving the JTAG chain is functional.

Common errors

• Swapping TX and RX: the absolute classic; swap them, then check the common ground.
• 5 V adapter on a 3.3 V (or 1.8 V) bank: respect the GPIO_VREF bank voltage; inputs tolerate at most VGPIO_VREF + 0.5 V (absolute maximum).
• Forgetting enable_uart=1: without it, the primary UART remains disabled and the debug connector is silent while everything else works.
• Powering the module via the serial converter in addition to the main power supply: double powering of the 3.3 V rails — the datasheet lists rail back-injection as a classic cause of boot failure.