🛠 Motor Control with PWM and ADC on HPM5100
Objectives
This tutorial explains how to configure the HPM5100 for controlling a DC or BLDC motor by utilizing hardware synchronization between PWM timers and Analog-to-Digital Converters (ADCs). The goal is to implement a low-latency current or speed control loop, leveraging the DSP capabilities of the 400 MHz RISC-V core.
Required Materials
- HPM5100 (HPM5151) development board
- Resistive load or small DC motor
- Oscilloscope or logic analyzer (optional)
- Connection cables
- HPM SDK v1.13.0 installed
Steps
- Clock Initialization: Configure the clock system so the RISC-V core runs at 400 MHz. PWM and ADC peripherals must be fed by stable sources to avoid jitter.
- PWM Configuration: Use the 32 PWM channels. Configure a PWM timer in center-aligned mode to generate complementary signals required for H-bridges. Enable trigger events for the ADC.
- SAR ADC Configuration: Enable one of the four 16-bit SAR ADCs. Configure the channel to read motor current via a shunt resistor. Set the trigger to the PWM period end event to sample at the midpoint of the pulse.
- Control Loop Implementation: In the main file, create an interrupt service routine (ISR) linked to the ADC conversion end. Read the raw value, convert it to actual current, and calculate the error against the setpoint (PID). Update the PWM compare register.
- Security and Debug: Enable hardware comparators if available to cut off PWM in case of overcurrent detected on the ADC, ensuring fast hardware protection.
Verification
Open a serial console via UART at 115200 baud. Display the current values read by the ADC in real-time. Use an oscilloscope to verify that PWM rising edges are synchronized with ADC sampling. Stability of readings under load indicates proper operation.
Going Further
Explore the use of internal operational amplifiers configured as PGAs to amplify the shunt signal before the ADC, thereby improving the effective resolution of the measured current.