🛠 BLDC Motor FOC Control on HPM5100
Objectives
This tutorial aims to implement Field-Oriented Control (FOC) on a BLDC motor by leveraging the HPM5100's integrated analog capabilities. The goal is to reduce hardware cost by using internal operational amplifiers as current sense amplifiers, while configuring the 16-bit SAR ADCs for precise sampling at 2 MSPS. We will synchronize ADC conversions with PWM signals generated by the 32 available channels to minimize switching noise.
Required Hardware
- HPM5100 development board (QFN or LQFP package).
- Three-phase BLDC motor with position sensor or sensorless algorithm.
- Three-phase MOSFET power stage (e.g., L6234 or discrete half-bridges).
- External 12V/24V power supply suitable for the motor.
- Short-length power and control wiring.
Steps
Configure two of the four integrated op-amps in PGA (Programmable Gain Amplifier) mode. Connect Phase U and V current measurement shunts to the differential inputs. Adjust the gain so that the maximum shunt voltage corresponds to the ADC full scale (typically 3.3V or 1.8V depending on the internal reference). ``c // SDK pseudo-code configuration adc_configure_input(ADC_CH0, PGA_GAIN_10X); adc_configure_input(ADC_CH1, PGA_GAIN_10X); ``
- Configure Operational Amplifiers (PGA)
Configure three PWM channel pairs (6 channels total out of 32 available) to generate complementary signals with dead-time for the three phases. Set the switching frequency to 20 kHz. Ensure the global synchronization register is enabled to align all PWM counters.
- PWM Initialization
Configure the four SAR ADCs to be triggered by the PWM cycle start signal. This ensures current sampling occurs at the center of the PWM pulse, where switching noise is minimal. Enable double-buffering mode to avoid losing samples during processing. ``c pwm_trigger_adc_enable(PWM_TIMER0); adc_set_trigger_source(ADC_TRIG_PWM0); ``
- ADC-PWM Synchronization
In the ADC end-of-conversion interrupt, read raw values. Apply Clark and Park transformations to obtain Id and Iq components. Use PI controllers to regulate these currents. The controller outputs are transformed via inverse Park transform to generate reference voltages. These voltages are converted into duty cycles for the PWM channels.
- Control Loop Implementation
Verification
Use an oscilloscope to verify that PWM signals are properly complementary with applied dead-time. Trace phase currents via DAC outputs (if available) or a logic analyzer. Check that motor rotation is smooth and speed responds to setpoints without excessive oscillations. Verify that high-performance mode (480 MHz) is enabled if necessary for fast FOC calculation.
Further Reading
Explore using analog comparators for hardware overcurrent protection. Implement sensorless startup by injecting HF signals. Test Secure Boot to protect the control algorithm.