🛠 Benchmark Ethernet iperf3 : mesurer le piège 10/100 vs gigabit

Pine64 PINE A64 / PINE A64+ (Allwinner A64) · intermediaire · Schéma : IMG-pine64-intermediaire-1-iperf3-ethernet.svg — PINE A64 reliee par cable Ethernet a un switch puis a un PC de bureau, graphique en barres comparant 94 Mbit/s (A64 de base, RTL8201) et 600+ Mbit/s (A64+, RTL8211), terminal iperf3 cote carte et cote PC, puce EMAC 1c30000 annotee dans le SoC

Objectives

Move from theory to proof: measure the actual throughput of your PINE A64's Ethernet port with iperf3 and document the historical Kickstarter pitfall — buyers of the base version discovering ~11 MB/s while expecting gigabit. You will learn to (1) verify the negotiated speed, (2) measure application-level throughput, (3) prove that the port is the SoC's internal EMAC, and (4) recognize the PHY power supply issue (DC1SW rail "vcc-phy") that causes unstable links on improperly corrected device trees.

Hardware

Complete Code

# Côté PC (serveur) :
iperf3 -s

# Côté Pine64 (client, 20 s) :
iperf3 -c 192.168.1.10 -t 20

# Interprétation :
#   PINE A64 de base (RTL8201, RMII)   : plafond ~94 Mbit/s  (10/100)
#   PINE A64+        (RTL8211, RGMII)  : jusqu'à ~600+ Mbit/s (gigabit)

# Vitesse négociée et état du lien :
sudo ethtool eth0 | grep -E 'Speed|Link'

# Prouver que c'est l'EMAC interne (pas un NIC USB) :
ls -l /sys/class/net/eth0/device      # -> .../1c30000.ethernet

# Lien instable ? Le noyau mainline impose un délai d'alimentation du PHY :
#   regulator-enable-ramp-delay sur DC1SW/vcc-phy — commentaire du DTS :
#   « Ethernet PHY needs 30ms to properly power up and some more to initialize »
dmesg | grep -iE 'eth|phy|link'

Expected Verification

On a base card, iperf3 caps around 94 Mbit/s — the "sender" line hovers around 11 MB/s: this is the signature of the RTL8201 10/100 PHY, not a defect. On an A64+, you will significantly exceed 100 Mbit/s (600+ Mbit/s expected in gigabit). The sysfs link 1c30000.ethernet confirms the integrated EMAC controller: the rumor of "gigabit via USB2" on this card is not confirmed by any schematic or device tree — both variants indeed start from the internal EMAC, only the PHY changes (RMII vs RGMII).

Common Errors

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