🛠 Zephyr RTOS sur le Nucleo STM32H743ZI : west build, flash et le piège des 96 MHz

STM32H7 Nucleo-144 (porte-drapeau : NUCLEO-H743ZI) · intermediaire · Schéma : IMG-stm32h7-nucleo-intermediaire-1-stm32h743zi-zephyr-rtos.svg — terminal affichant « west build -b nucleo_h743zi » et « west flash », flèche vers la Nucleo-144 STM32H743ZI avec sa LED LD1 allumée, câble USB vers l'ST-LINK/V2-1, horloge barrée annotée « 96 MHz par défaut », flat vector style, étiquettes en français, fond blanc.

What you will build

Zephyr treats nucleo_h743zi as a first-class board with its own board documentation, and the flow is the cleanest of any MCU stack on this hardware: west build, west flash, done. This tutorial builds and flashes Zephyr's blinky, then digs into the fact that bites everyone: Zephyr boots this board at 96 MHz by default, not 480 MHz.

Prerequisites

Step 1 — Build and flash

$ west build -b nucleo_h743zi samples/basic/blinky
$ west flash          # STM32CubeProgrammer runner (default)
# alternatives verified by the board doc:
$ west flash --runner openocd
$ west flash --runner jlink
$ west flash --runner pyocd

Step 2 — The application

/* blinky.c — LD0 alias maps to the board's user LED in the nucleo_h743zi tree. */
#include <zephyr/kernel.h>
#include <zephyr/drivers/gpio.h>

static const struct gpio_dt_spec led =
        GPIO_DT_SPEC_GET(DT_ALIAS(led0), gpios);

int main(void)
{
        if (!gpio_is_ready_dt(&led)) {
                return -1;
        }
        gpio_pin_configure_dt(&led, GPIO_OUTPUT_ACTIVE);

        while (1) {
                gpio_pin_toggle_dt(&led);   /* LD1 = PB0 in the default mapping */
                k_msleep(500);
        }
        return 0;
}

Step 3 — Console

The Zephyr default console is UART3 (PD8/PD9) on the ST-LINK virtual COM port at 115200 8N1 — hello_world output lands there with no devicetree edits. The default mapping also gives you USER button PC13, LD1 PB0, LD2 PE1, LD3 PB14, I2C PB8/PB9, ADC1_INP15 PA3 and DAC1_OUT1 PA4.

Step 4 — The 96 MHz trap

Zephyr boots the board at a 96 MHz PLL (from the 8 MHz HSE) by default, while the STM32duino core runs the same silicon at 480 MHz SYSCLK. Consequences:

Expected result

LD1 (PB0) blinks every 500 ms after west flash reports success ; hello_world prints to the VCP at 115200.

Common pitfalls

Autres tutoriels pour cette carte

Exemples de code pour cette carte

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