microDb

RP2350 (generic / RP2350-based boards)

Raspberry Pi LtdMCU 8-32 bitarduino

⚡ The essentials in 60 seconds

The RP2350 represents a significant evolution in the world of microcontrollers, serving as the second generation of silicon from Raspberry Pi Ltd, following the highly successful RP2040. Announced in August 2024, this chip is designed to be the heart of a wide variety of development boards, ranging from the official Raspberry Pi Pico 2 to numerous third-party modules like the SparkFun Pro Micro, Seeed XIAO, and various generic boards. It is important to distinguish the chip itself from any single board; the RP2350 is a versatile component that manufacturers can integrate into different form factors, offering flexibility for hobbyists and engineers alike. With a starting price as low as eighty cents in volume, it aims to provide high performance at an accessible cost, with Raspberry Pi guaranteeing the availability of the reference Pico 2 board until at least January 2040, signaling a long-term commitment to this platform.

At the core of the RP2350 lies a unique architectural feature that sets it apart from most other microcontrollers in its class: the ability to select between two different processor architectures at runtime. The chip contains dual-core processing capabilities, allowing the user to choose between two Arm Cortex-M33 cores or two Hazard3 RISC-V cores. Both options run at a nominal clock speed of 150 MHz. The Arm Cortex-M33 is a modern 32-bit processor that supports advanced security features and digital signal processing, while the Hazard3 RISC-V cores offer an open-source instruction set architecture. A key aspect of this design is that only one architecture runs at a time for a given pair of cores, but users can switch between them without needing to power cycle the device, using a specific register and a core reset. This flexibility allows developers to leverage the extensive software ecosystem of Arm or the open nature of RISC-V, depending on their project needs. However, it is worth noting that while the cores are faster in terms of architecture, the 150 MHz clock speed is lower than the 200 MHz of its predecessor, the RP2040, so developers migrating code should not assume direct cycle-counting compatibility.

Memory and storage capabilities have been significantly enhanced compared to previous generations. The RP2350 features 520 KB of SRAM, which is double the amount found in the RP2040. This memory is divided into ten independently accessible banks, allowing for single-cycle access that can improve performance for data-intensive applications. The chip does not include internal flash storage; instead, it relies on external QSPI flash or PSRAM, supporting up to 16 MB with execute-in-place capability, meaning the processor can run code directly from the external memory without loading it into RAM first. An optional second chip select allows for another 16 MB of external memory. For variants like the RP2354, 2 MB of flash is stacked directly on the die within the package, simplifying board design for those who need integrated storage. Additionally, there is 8 KB of one-time-programmable (OTP) memory, which is used for storing unique identifiers, security keys, and boot configuration data that cannot be altered after manufacturing.

Connectivity and peripheral support are robust, though the chip itself does not include wireless capabilities. There is no on-chip WiFi or Bluetooth; boards that offer wireless connectivity, such as the Pico 2 W, achieve this through an add-on radio companion chip. The RP2350 includes a USB 2.0 Full-Speed device controller and host capability, allowing it to communicate with computers and other USB devices. The GPIO count varies by package, with the RP2350A offering 30 GPIOs and the RP2350B providing 48. These pins operate at voltages between 1.8 and 3.3 volts. The peripheral set includes two UARTs, two SPI interfaces, two I2C interfaces, and a QSPI interface for external memory. A standout feature is the Programmable I/O (PIO) system, which has been expanded to three blocks with twelve state machines in total, compared to two blocks and eight state machines in the RP2040. This allows for highly customized digital interfaces and timing-critical tasks to be handled by hardware rather than software, freeing up the CPU for other tasks. The chip also includes a high-speed serial transmitter (HSTX) for driving displays or other digital interfaces, capable of speeds up to 300 Mb/s per pin.

Security is a major focus of the RP2350, introducing features unusual for such low-cost silicon. It supports Arm TrustZone-M, which allows for the creation of secure and non-secure domains within the system. Peripherals, GPIOs, and DMA channels can be individually assigned to these domains, providing hardware-enforced isolation. The chip includes a hardware SHA-256 accelerator, a true random number generator (TRNG), and support for secure boot using ECDSA signatures. This ensures that only trusted code can run on the device, protecting intellectual property and preventing unauthorized modifications. However, enabling secure boot forces the use of the Arm Cortex-M33 cores, disabling the RISC-V option, as the security mechanisms are tied to the Arm boot path. It is also worth noting that early silicon steppings had some errata, such as input leakage on Bank 0 GPIOs, which has been fixed in later A3 and A4 steppings. Users should be aware of these hardware revisions when designing new products, as early chips may exhibit unexpected behavior with floating inputs.

Software support for the RP2350 is extensive, reflecting its position as a mainstream microcontroller. The official Raspberry Pi Pico C/C++ SDK provides comprehensive support, with build systems that allow targeting specific boards. For third-party boards, developers may need to provide a custom board header file, as the SDK does not include definitions for every generic RP2350 module. MicroPython and CircuitPython both offer official ports for the RP2350, allowing for rapid prototyping using high-level languages. The Arduino ecosystem is also well-supported through the community-maintained Arduino-Pico core, which includes a "Generic RP2350" board entry, making it easy to use standard Arduino libraries. For systems programming, Rust developers can utilize the rp235x-hal crate and the Embassy async framework, which provide safe and efficient access to the hardware. This broad language support ensures that developers can choose the toolchain that best fits their skills and project requirements, whether they prefer low-level control or high-level abstraction.

Despite its strengths, the RP2350 has some limitations and considerations. The lack of on-chip wireless means that projects requiring WiFi or Bluetooth must rely on external modules, which can increase board size and complexity. The need for external flash storage adds another component to the design, although this also offers flexibility in choosing memory size and type. The dual-architecture feature, while innovative, requires careful management, as switching between Arm and RISC-V cores involves resetting the cores and may not be suitable for all real-time applications. Additionally, the security features, while powerful, add complexity to the development process, particularly when implementing secure boot and key management. The DEF CON hacking challenge highlighted vulnerabilities in early secure boot implementations, which have since been mitigated in newer silicon steppings. Developers should stay informed about errata and hardware revisions to ensure their designs are robust and secure. Overall, the RP2350 offers a compelling combination of performance, flexibility, and security, making it a versatile choice for a wide range of embedded applications, from simple blinking LEDs to complex real-time control systems.

Generic board around the RP2350 microcontroller, successor to the RP2040.
Generic board around the RP2350 microcontroller, successor to the RP2040.Wikipedia - RP2350, licence Commons
Additional illustration of RP2350 (carte générique), image hosted on Wikimedia Commons.
Additional illustration of RP2350 (carte générique), image hosted on Wikimedia Commons.Wikipedia/Commons - DEV-24870-Pro-Micro-RP2350-Feature.jpg, CC BY 2.0
Additional illustration of RP2350 (carte générique), image hosted on Wikimedia Commons.
Additional illustration of RP2350 (carte générique), image hosted on Wikimedia Commons.Wikipedia/Commons - DEV-24870-Pro-Micro-RP2350-Back.jpg, CC BY 2.0

Pinout diagram

GPIO pinout diagram of the Microcontrôleur RP2350 (Raspberry Pi source)
GPIO pinout diagram of the Microcontrôleur RP2350 (Raspberry Pi source)Raspberry Pi — raw.githubusercontent.com

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AttrSpecsverified
mcu_cpudual-core, selectable architecture: two Arm Cortex-M33 (Armv8-M, Security/TrustZone-M, DSP, single-precision FPU + double-precision coprocessor) or two Hazard3 RISC-V cores (RV32IMAC). Only one architecture runs at a time per core pair; cores can be swapped live via the ARCHSEL register plus core reset (datasheet §1.1, §3; also Clock: 150 MHz nominal.✔
gpunone (no display engine; HSTX is a digital serial transmitter, see below).? unverified
ram520 KB SRAM in 10 independently accessible banks, single-cycle access (datasheet §1.1).? unverified
storageno internal flash. 8 KB one-time-programmable (OTP) memory. External QSPI flash/PSRAM up to 16 MB with execute-in-place (XIP) + optional second chip select for another 16 MB. RP2354 adds 2 MB in-package flash.? unverified
connectivityno WiFi/Bluetooth on-chip. 1× USB controller: USB 2.0 Full-Speed device (12 Mb/s), Full/Low-Speed host (integrated USB 1.1 PHY) (datasheet §12 USB). Wireless on "W" boards (e.g. Pico 2 W) comes from an add-on radio companion chip.? unverified
gpio_peripherals- 30 GPIO (RP2350A) or 48 GPIO (RP2350B); IO voltage IOVDD 1.8–3.3 V (datasheet §1.2 pin description tables). - ADC: 12-bit SAR, 500 kSPS, 4 channels (A) / 8 channels (B) + internal temperature channel (datasheet; No DAC. - PWM: 8 (A) / 12 (B) dual-channel slices = 16/24 channels ( - 2× UART, 2× SPI, 2× I²C, 1× QSPI (XIP), 1× HSTX high-speed serial transmitter (output-only, 8 pins, DDR — Wikipedia cites 300 Mb/s per pin). - PIO: 3 blocks, 12 state machines total (vs 2 blocks / 8 SMs on RP2040), with 2 dedicated IRQs per block (PIO0/1/2_IRQ_0/1) vs one shared pair on RP2040 (datasheet §3.2 interrupt table, p.81–82). - DMA: 16 channels, 4 IRQ outputs (datasheet interrupt table DMA_IRQ_0–3; comparison table in - Interrupts: 52 IRQ inputs per core, all routed to both cores (datasheet §3.2).✔
poweron-chip SMPS (buck, up to 200 mA, VOUT 0.55–3.3 V, nominal 1.1 V core) + low-quiescent LDO mode (up to 1 mA for state retention in sleep); VREG_VIN 2.7–5.5 V; USB_OTP_VDD and ADC_AVDD 3.3 V (datasheet §1.1, §6.3, §14.9.6).? unverified
temperatureambient operating range −40 to 85 °C (datasheet §14.9.3, Table 1682); regulator over-temperature shutdown, junction threshold configurable 100–150 °C (datasheet §6.3.6).? unverified
process_package40 nm ( 5.3×5.3 mm die in QFN-60EP or QFN-80EP, 0.4 mm pitch (Wikipedia).✔
rp2040_relationshipthe RP2350 is software-compatible with the RP2040 (same SDK family, PIO heritage) per At board level, Pico-2-format boards keep the original Pico's 40-pin, 51×21 mm, 0.1″-castellation format (Pico 2 Datasheet, mechanical spec). The chip package itself (QFN-60/80) is not pin-identical to RP2040's QFN-56 — compatibility is at SDK/board level, not silicon footprint.✔
  • Manufacturer: Raspberry Pi Ltd (UK). The RP2350 is Raspberry Pi's second microcontroller silicon, after the RP2040. This card covers the chip itself and the many third-party "generic RP2350" boards built around it (Pico-2 compatible modules, Pro Micro, XIAO, Stamp, etc.), not the Raspberry Pi Pico 2 board specifically.
  • Announced: 8 August 2024, launched on the Raspberry Pi Pico 2 at US$5; the RP2350 chip itself costs as little as US$0.80 in volume ( retrieved 2026-10-13).
  • Status: Active. Raspberry Pi guarantees availability of the Pico 2 board until at least January 2040 (Raspberry Pi Pico 2 Datasheet, "Availability", retrieved 2026-10-13).
  • Variants (chip): RP2350A (30 GPIO, QFN-60 7×7 mm), RP2350B (48 GPIO, QFN-80 10×10 mm), RP2354A/RP2354B — same packages with 2 MB in-package QSPI NOR flash stacked on the die ( RP2350 Datasheet §1.1, Silicon steppings A2 → A3 → A4 (A4 identified by CHIP_ID.REVISION = 0x3; datasheet Appendix C, retrieved 2026-10-13).
  • Common board formats using it: Raspberry Pi Pico 2 / Pico 2 W; SparkFun Pro Micro RP2350 & Thing Plus RP2350; Seeed XIAO RP2350; Solder Party RP2350 Stamp (XL); Waveshare RP2350 Core/Zero/Plus/PiZero; Pimoroni PicoPlus2 / Tiny2350 / Plasma2350; Adafruit Metro RP2350 / Feather RP2350; Olimex Pico2XL/XXL; "Generic RP2350" entries in the Arduino-Pico core ( retrieved 2026-10-13).

＋ Strengths

  • Selectable CPU architecture at runtime: dual Cortex-M33 or dual Hazard3 RISC-V at 150 MHz, switchable without power-cycling (ARCHSEL + core reset) — unique at this price point (datasheet §1.1; Wikipedia).
  • Security stack unusual for $1 silicon: Arm TrustZone-M extended system-wide — peripherals, GPIOs and DMA channels are individually assignable to Secure/Non-secure domains; 8 SAU regions + 8+8 MPU regions per core; secure boot (SHA-256 + secp256k1 ECDSA, OTP public-key fingerprint, anti-rollback); encrypted boot keys in OTP; hardware SHA-256 accelerator; TRNG (Arm IP block); redundancy coprocessor (RCP) and glitch detector as fault-injection mitigations (datasheet §10, §3.6.3, §12.12–12.13).
  • Triple PIO: 3 PIO blocks / 12 SMs with per-block IRQs, plus HSTX for high-speed digital video-style output — RP2040-compatible philosophy, doubled I/O horsepower (datasheet §1.1, §3.2).
  • 520 KB RAM in 10 banks (2× RP2040), 8 KB OTP, 16+16 MB addressable QSPI.
  • Low-cost, long-lived: from $0.80 in volume; board availability guaranteed to 2040 (Wikipedia; Pico 2 Datasheet).
  • Broad language support: C/C++, MicroPython, CircuitPython, Arduino, Rust (embassy/rp-hal), Free Pascal, assembly (Wikipedia; ecosystem READMEs above).

− Weaknesses

  • RP2350-E9 — Bank 0 GPIO input leakage (the big one). Early chips (stepping A2): pins configured as inputs source ~120 µA when the input sits between logic levels, floating inputs to ~2.2 V; originally documented as "latching pull-down" errata, reclassified as "increased leakage current on Bank 0 GPIO when pad input is enabled". Reported by users incl. the Bus Pirate developers. Fixed in A3/A4 steppings announced July 2025. References: ; ;
  • RP2350-E3 (QFN-60 only): GPIO_NSMASK0 applies Non-secure PADS permissions to the wrong pads because the register mapping ignores the QFN-60 pad remapping — affects TrustZone use of PADS registers on RP2350A (datasheet Appendix D.1.1).
  • Bootrom errata fixed in later steppings: E13 (invalid IMAGE_DEF blocks boot), E14 (connect_internal_flash ignores CS1 pin), E15 (OTP page 62/63 permissions), E18 (bad ECC pattern in OTP partition field bricks boot), E22–E23, E25 — see datasheet Appendix C/D (A3/A4 bootrom changelists).
  • Fault-injection findings from the DEF CON 32 hacking challenge: the $10k→$20k OTP-read challenge was won in January 2025 (4 winners) via laser fault injection on secure boot and focused-ion-beam OTP read-out; Raspberry Pi shipped mitigations as errata E20/E21/E24/E26 (bootrom changes in A3/A4). ; datasheet Appendix C.2–C.3.
  • Secure boot disables RISC-V: signature enforcement lives on the Cortex-M33 boot path, so enabling SB forces Arm cores (Wikipedia, citing datasheet §10).
  • Generic boards need a custom SDK board header: pico-sdk master ships pico2/pico2_w headers but no "generic RP2350" header; third-party boards either ship a header (Arduino core does) or you write one (
  • 150 MHz vs RP2040's 200 MHz: the RP2350 clock is lower than RP2040's 200 MHz despite the faster cores — don't assume cycle-counting portability when migrating RP2040 code (Wikipedia comparison table).
  • Retour d'expérience expert expert — expert-microcontroleur
    • Retour d'experience sur les cartes generiques RP2350. Le selcteur d'architecture entre Cortex-M33 et Hazard3 RISC-V a 150 MHz est reellement utile et fonctionne sans réinitialisation materielle. Par contre attention aux steppings. Les puces A2 souffrent de l'errata RP2350-E9 sur la fuite en entrée … — expert-microcontroleur
    • Salut, je confirme pour le E9 sur mon Stamp RP2350. J'ai passe des heures a diagnostiquer pourquoi mes entrées analogiques etaient faussees par les numériques voisines. En mettant des résistances de pull-down externes sur chaque ligne sensible, j'ai stabilise la lecture, mais ça consomme de la plac… — maker-bidouilleur-42
    • Interessante remarque sur le E9. Pour ma part, j'utilise surtout le mode RISC-V Hazard3 pour des taches de calcul vectoriel et la bascule dynamique est fluide. Par contre, je n'ai pas rencontre le E3 sur mes cartes Pico-compatible, mais je suppose que ce n'est pas du QFN-60 ? Si tu as un module Pro… — dev-embedded-riscv

Community feedback and projects

  • Official pico-examples

    Official pico-examples — blinky, hello_world, PIO, HSTX demos that build (unverified au 2026-10-13) — internal hosted on internal site, live status verified on 2026-10-13. Project documented in the rp2350-generic sheet (MCU 8-32 bit); role: deepen hands-on ex…

Content not available yet.

  • RP2350-E9 — Bank 0 GPIO input leakage (the big one). Early chips (stepping A2): pins configured as inputs source ~120 µA when the input sits between logic levels, floating inputs to ~2.2 V; originally documented as "latching pull-down" errata, reclassified as "increased leakage current on Bank 0 GPIO when pad input is enabled". Reported by users incl. the Bus Pirate developers. Fixed in A3/A4 steppings announced July 2025. References: ; ;
  • RP2350-E3 (QFN-60 only): GPIO_NSMASK0 applies Non-secure PADS permissions to the wrong pads because the register mapping ignores the QFN-60 pad remapping — affects TrustZone use of PADS registers on RP2350A (datasheet Appendix D.1.1).
  • Bootrom errata fixed in later steppings: E13 (invalid IMAGE_DEF blocks boot), E14 (connect_internal_flash ignores CS1 pin), E15 (OTP page 62/63 permissions), E18 (bad ECC pattern in OTP partition field bricks boot), E22–E23, E25 — see datasheet Appendix C/D (A3/A4 bootrom changelists).
  • Fault-injection findings from the DEF CON 32 hacking challenge: the $10k→$20k OTP-read challenge was won in January 2025 (4 winners) via laser fault injection on secure boot and focused-ion-beam OTP read-out; Raspberry Pi shipped mitigations as errata E20/E21/E24/E26 (bootrom changes in A3/A4). ; datasheet Appendix C.2–C.3.
  • Secure boot disables RISC-V: signature enforcement lives on the Cortex-M33 boot path, so enabling SB forces Arm cores (Wikipedia, citing datasheet §10).
  • Generic boards need a custom SDK board header: pico-sdk master ships pico2/pico2_w headers but no "generic RP2350" header; third-party boards either ship a header (Arduino core does) or you write one (
  • 150 MHz vs RP2040's 200 MHz: the RP2350 clock is lower than RP2040's 200 MHz despite the faster cores — don't assume cycle-counting portability when migrating RP2040 code (Wikipedia comparison table).

Code library — examples written for this board

  • clignotante.py Python

    The first MicroPython program: the LED blinks once per second with serial console tracing. It shows Pin as output, value() and time.sleep, the basis of every embedded script on the board.

  • bouton-interruption.py Python

    The button wired to GP15 toggles the LED through a hardware interrupt (irq): no CPU cycle wasted polling the pin. A 50 ms filter inside the handler removes mechanical contact bounce.

  • pwm-servo.py Python

    The hobby servo sweeps 0 to 180° and back, driven at 50 Hz PWM by machine.PWM. The angle() helper converts degrees into a 0.5 to 2.5 ms pulse through duty_u16, the standard technique with no dedicate…

  • lecture-adc.py Python

    Two 12-bit analog readings in one script: an external voltage on GP26 (ADC0) and the chip's built-in thermal sensor converted to degrees using datasheet parameters. Great for watching CPU load.

  • neopixel.py Python

    A white head followed by a red trail moves along a 12-LED NeoPixel (WS2812B) strip, driven natively by MicroPython through machine.NeoPixel. Each LED gets its color in a single frame sent by write().

  • oled-i2c.py Python

    A 0.96" SSD1306 OLED (128x64) wired in I2C shows text and a counter. The script first scans the bus to confirm the module is present, then uses the ssd1306.py driver shipped with MicroPython.

  • capteur-dht.py Python

    The dht module built into MicroPython drives DHT11/DHT22 sensors on any pin. The script measures every 2 s (the sensor minimum rate), catches frame errors and prints temperature and humidity.

  • journalisation.py Python

    MicroPython exposes the internal flash as a filesystem: this script writes a temperature CSV there every 5 s, in append mode so data is never overwritten. The file is later retrieved like a USB stick.

  • uart-commandes.py Python

    A mini command server on UART0 (GP0/GP1): classic serial modules (GPS, cellular modem, another microcontroller) can toggle the LED, read the temperature or poll the board with simple text lines.

  • taches-cooperatives.py Python

    Three periodic tasks (LED 2 Hz, beep 1 Hz, reading every 5 s) run on a 15-line cooperative mini scheduler. This pattern replaces nested delay() calls as soon as a project animates more than one pin.

Examples and repos found online