⚖ Comparison : ESP32-C3 vs ESP32-C6
Comparison of declared technical characteristics : ESP32-C3 et ESP32-C6 (17 characteristics). See the full board sheet : ESP32-C3 · ESP32-C6.
| Characteristics | ESP32-C3 | ESP32-C6 |
|---|---|---|
cpu | single-core 32-bit RISC-V RV32IMC @ up to 160 MHz, plus a 20 MHz ultra-low-power RISC-V coprocessor ("power management" core) ( datasheet | — |
memory | 400 KB internal SRAM, 384 KB ROM, 24 KB in low-power SRAM ( datasheet URL above). | 512 KB HP SRAM, 16 KB LP SRAM, 320 KB ROM, 32 KB L1 cache, 4096-bit eFuse (≤1792 bits user) (datasheet Feature List). |
storage | external or in-package SPI flash, 4 MB typical on MINI-1 (up to 16 MB supported) ( | no in-package flash on the base ESP32-C6 (external SPI/QSPI flash via SPI0/1); FH4/FH8 have 4/8 MB in-package; modules ship 4–16 MB. No PSRAM interface listed in the C6 datasheet (the C61 derivative adds PSRAM per CNX above). |
connectivity | Wi-Fi 802.11 b/g/n 2.4 GHz + Bluetooth 5 (LE) with long-range (Coded PHY), BLE Mesh, ESP-WIFI-MESH; no Bluetooth Classic ( | — |
usb | USB-Serial/JTAG device peripheral (CDC console + flashing + JTAG debug on GPIO18/19) — it is not USB-OTG; you cannot build USB HID devices with it (datasheet URL above). | USB 2.0 full speed (12 Mbit/s) via the USB Serial/JTAG controller on GPIO12/13 — CDC console + flashing + JTAG debug. It is a device-side debug/console interface, not USB-OTG (see Problems) (datasheet Feature List; TRM has a single USB chapter, "Chapter 32 USB Serial/JTAG Controller": |
gpio | 22 programmable GPIOs (GPIO0–GPIO21); 2× UART, 1× I2C, 1× SPI, 2× I2S, 1× RMT TX/RX pair, LEDC PWM (6 channels), 1× TWAI (CAN), GPIO matrix routing (datasheet URL above). - ADC: 12-bit SAR with a handful of channels on GPIO0–GPIO5 (exact mapping package-dependent). > | 30 GPIOs on QFN40, 22 on QFN32; 5 strapping GPIOs; 6 GPIOs consumed when the flash is off-package (GPIO24/25/26/28/29/30 recommended for SPI0/1 flash) (datasheet §2.3.4). Strapping pins: GPIO5, GPIO8, GPIO9, GPIO15; boot-mode straps are GPIO8+GPIO9 (datasheet §3). GPIO12/13 = USB, GPIO4–7 = JTAG, GPIO16/17 = UART0, GPIO27 = VDD_SPI (datasheet §2.3.4 notes). |
logic_level | 3.3 v | 3.0–3.6 V (VDDPST/VDD_SPI recommended 3.3 V); not 5 V tolerant (datasheet §2.5 Power Supply). |
power | multiple low-power modes with ULP FSM; deep sleep in the single-digit µA class (datasheet power tables). > | four modes (Active / Modem-sleep / Light-sleep / Deep-sleep); Deep-sleep ≈ 7 µA with LP SRAM retained (datasheet Power Management); 40 nm process (ESP-IDF Get Started: |
temperature | high-temperature support marketed for industrial/lighting ( exact grade per chip marking — datasheet §General Characteristics. | −40 ∼ 105 °C ambient, all orderable variants (datasheet Table 1-1). |
main_cpu | — | single 32-bit RISC-V HP core, RV32IMAC, four-stage pipeline, up to 160 MHz; CoreMark 496.66 (3.10 CoreMark/MHz at 160 MHz) (datasheet Product Overview: |
co_processor | — | low-power (LP) 32-bit RISC-V core, RV32IMAC, two-stage pipeline, up to 20 MHz; stays powered in deep-sleep (datasheet §LP RISC-V). Programmable via esp-lp-hal ( |
gpu | — | none. |
wi_fi | — | 2.4 GHz only (2412–2484 MHz), 1T1R. Wi-Fi 6 (802.11ax) HE20 mode, up to 150 Mbps PHY, uplink+downlink OFDMA, downlink MU-MIMO, Target Wake Time (TWT) requester; backward 802.11b/g/n with 20/40 MHz bandwidth, MCS0–7; TX power up to +19.5 dBm (ax) (datasheet Wi-Fi Feature List; product page). |
bluetooth | — | Bluetooth 5 (LE) only — no Bluetooth Classic; Coded PHY long range, advertising extensions, 2 Mbps PHY; RX sensitivity down to −106 dBm @125 kbps (datasheet; product page). |
802_15_4 | — | IEEE 802.15.4 radio for Zigbee 3.0 and Thread 1.3; Wi-Fi/BLE/802.15.4 coexist and share one antenna (datasheet Product Overview). |
peripherals | — | 2× UART + LP UART, 2× I2C (1 HP + 1 LP), general-purpose SPI (plus 2 flash ports), 1× I2S, LED PWM 6 channels, MCPWM (motor), 2× TWAI® (CAN 2.0), RMT TX/RX, PARLIO, PCNT, SDIO slave, USB Serial/JTAG, event task matrix (ETM), GDMA, 52-bit system timer, 2× 54-bit general-purpose timers, watchdogs, RISC-V trace encoder (datasheet Feature List; ESP-IDF soc_caps: |
analog | — | 12-bit SAR ADC, up to 7 channels; on-chip temperature sensor; no DAC and no Hall sensor listed (datasheet §4.2.2 Analog Signal Processing). |