🛠 USB OTG FS et SDIO réels : les périphériques cachés derrière les en-têtes morpho

STM32 Nucleo-64 F4 family — flagship: Nucleo-F401RE · avance · Schéma : IMG-stm32f4-nucleo-avance-8-stm32f4nuc-usb-otg-sdio-morpho.svg — le connecteur micro-USB de la carte mène au ST-LINK tandis que l'OTG FS du MCU et le SDIO sortent sur les en-têtes morpho vers un connecteur USB et une carte SD

Goals

Understand the two most misleading "features" of the Nucleo-F401RE: the board's micro-USB socket is not the MCU's USB, and the MCU's real USB 2.0 OTG FS and SDIO peripherals are only reachable on the ST morpho headers. Then plan actual wiring for both.

The trap

The board USB connector (micro-B, full-speed) is wired to the ST-LINK/V2-1 host adapter, which enumerates as SWD debugger + virtual COM port + USB mass-storage device. The STM32F401RE's USB 2.0 OTG FS pins are broken out on the morpho headers, not routed to the board connector. So Serial works with zero USB knowledge — and any sketch that wants the MCU itself to be a USB device needs external wiring.

What the silicon actually has (Zephyr board doc)

USB 2.0 OTG FS (device/host), SDIO, DMA controller, 4× SPI, 3× I2C, 3× USART/UART, I2S, 12-bit ADC with 16 channels, RTC, 1 advanced + 7 general-purpose timers, 2 watchdogs.

Steps — OTG FS on the morpho

  1. Identify the OTG FS pins (DM/DP) for the F401RE on the morpho headers. >
  2. Wire a USB female connector: DM/DP with short traces and series resistors, VBUS from your own 5 V source (the board connector's VBUS feeds the ST-LINK side), grounds tied.
  3. In CubeMX enable USB_OTG_FS in device mode (e.g. the CDC class) and generate:
/* CubeMX-style skeleton: the MCU becomes the USB device */
void MX_USB_DEVICE_Init(void)
{
  hpcd_USB_OTG_FS.Instance = USB_OTG_FS;  /* pins live on the morpho headers */
  HAL_PCD_Init(&hpcd_USB_OTG_FS);
  USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS);
  USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC);
  USBD_Start(&hUsbDeviceFS);
}

Steps — SDIO

  1. Wire an SD socket to the SDIO pins (CMD, CLK, D0–D3) in the 3.3 V domain — VDD range is 1.7–3.6 V, no 5 V.
  2. Start from the SDIO example projects under Projects/STM32F401RE-Nucleo in STM32CubeF4 — GPIO, ADC, USART, USB and SDIO examples for this exact board are maintained by ST.
  3. Stream with the on-chip DMA controller so the 84 MHz Cortex-M4F stays free while blocks move to the card.

Expected result

A CDC device that appears because the MCU is the USB device — not the ST-LINK — and an SD card logging at SDIO speeds without bit-banging. Both coexist with the ST-LINK's own COM port: one design, two serial ports, zero confusion once the two USB worlds are separated in your head.

Common mistakes

Other tutorials for this board

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