ESP32-C6

Espressif SystemsMCU 32-bitarduino

⚡ The essentials in 60 seconds

main_cpu — single 32-bit RISC-V HP core, RV32IMAC, four-stage pipeline, up to 160 MHz; CoreMark 496.66 (3.10 CoreMark/MHz at 160 MHz) (datasheet Product Overview:
co_processor — low-power (LP) 32-bit RISC-V core, RV32IMAC, two-stage pipeline, up to 20 MHz; stays powered in deep-sleep (datasheet §LP RISC-V). Programmable via esp-lp-hal (
gpu — none.
memory — 512 KB HP SRAM, 16 KB LP SRAM, 320 KB ROM, 32 KB L1 cache, 4096-bit eFuse (≤1792 bits user) (datasheet Feature List).
storage — no in-package flash on the base ESP32-C6 (external SPI/QSPI flash via SPI0/1); FH4/FH8 have 4/8 MB in-package; modules ship 4–16 MB. No PSRAM interface listed in the C6 datasheet (the C61 derivative adds PSRAM per CNX above).
wi_fi — 2.4 GHz only (2412–2484 MHz), 1T1R. Wi-Fi 6 (802.11ax) HE20 mode, up to 150 Mbps PHY, uplink+downlink OFDMA, downlink MU-MIMO, Target Wake Time (TWT) requester; backward 802.11b/g/n with 20/40 MHz bandwidth, MCS0–7; TX power up to +19.5 dBm (ax) (datasheet Wi-Fi Feature List; product page).
On this board : 9 tutorials · 10 code

The ESP32-C6 represents a significant evolution in the landscape of affordable, connected microcontrollers, positioning itself as a versatile system-on-chip designed for the modern Internet of Things. Manufactured by Espressif Systems, this chip is not merely a standalone component but the heart of a broader ecosystem that includes popular development modules like the ESP32-C6-MINI-1 and the ESP32-C6-WROOM-1, as well as official development boards such as the DevKitC-1 and DevKitM-1. Announced in 2021 and having reached mass production status with its official datasheet release in 2023, the ESP32-C6 is built on a 40-nanometer process, a technology node that balances power efficiency with manufacturing cost. It is important to understand that when makers refer to the "ESP32-C6," they are often referring to the chip itself, which comes in various package types like QFN40 or QFN32, but they typically interact with it through these pre-assembled modules that include necessary flash memory and antenna components. This distinction is crucial for hardware designers, as the bare chip requires external flash memory, whereas specific variants like the ESP32-C6FH4 and ESP32-C6FH8 integrate 4 MB or 8 MB of flash directly within the package, simplifying the design process for compact devices.

At the core of the ESP32-C6 lies a single 32-bit RISC-V high-performance CPU core. For those unfamiliar with the term, RISC-V is an open-standard instruction set architecture, meaning it is not owned by a single corporation, which fosters a wide community of developers and toolchains. This core operates at up to 160 MHz and features a four-stage pipeline, delivering a performance benchmark of 496.66 CoreMark. While this might seem modest compared to high-end application processors, it is more than sufficient for controlling sensors, managing network protocols, and handling user interfaces in embedded systems. A standout feature of this architecture is the inclusion of a second, low-power RISC-V core. This secondary processor runs at a lower frequency of up to 20 MHz and is designed to stay active even when the main high-performance core is powered down during deep-sleep modes. This dual-core approach allows for sophisticated power management; for instance, the low-power core can monitor a sensor or wake up the main system when an event occurs, all while consuming minimal energy. The chip achieves a deep-sleep current of approximately 7 microamps, making it ideal for battery-operated devices that need to last for years on a single charge.

The connectivity capabilities of the ESP32-C6 are what truly set it apart from its predecessors. It is the first Espressif SoC to integrate three distinct radio technologies into a single chip: Wi-Fi 6, Bluetooth 5 LE, and IEEE 802.15.4. The Wi-Fi 6 support, technically known as 802.11ax, operates exclusively on the 2.4 GHz band. It is essential to clarify that this is an entry-level implementation of Wi-Fi 6, supporting 20 MHz channels and single-stream transmission, which caps the physical layer speed at 150 Mbps. It does not support the 5 GHz band or the wider channels found in high-end routers, so it should not be confused with full-spec Wi-Fi 6 access points. However, it includes critical features like Target Wake Time, which allows devices to negotiate specific times to wake up and communicate, drastically reducing power consumption. Alongside Wi-Fi, the chip supports Bluetooth 5 Low Energy, offering long-range coded PHY modes and 2 Mbps high-speed data transfer. The third radio, 802.15.4, enables support for Zigbee 3.0 and Thread 1.3 protocols. These are mesh networking standards that allow devices to communicate with each other and relay messages, forming the backbone of the Matter smart home standard. Because all three radios share a single antenna, the hardware design is compact, but developers must manage the coexistence of these protocols carefully to avoid interference.

From a hardware interface perspective, the ESP32-C6 provides a robust set of peripherals suitable for a wide range of applications. It offers up to 30 GPIOs on the QFN40 package, though this number decreases on smaller packages or when specific functions are enabled. For example, using the built-in USB Serial/JTAG controller consumes GPIO12 and GPIO13, while the SPI flash interface on external flash designs reserves GPIO24 through GPIO30. The chip includes two UARTs, two I2C interfaces, general-purpose SPI, and an I2S interface for audio. It also features a 12-bit SAR ADC with up to seven channels for reading analog sensors, along with an on-chip temperature sensor. Notably, the ESP32-C6 does not include a Digital-to-Analog Converter or a Hall effect sensor, which are present in some older ESP32 models, so designers planning to use these specific analog features will need external components. The logic levels operate between 3.0 and 3.6 volts, meaning the pins are not 5-volt tolerant, a common pitfall for beginners connecting to Arduino-style shields or other 5V logic devices without level shifting.

Software support for the ESP32-C6 is extensive and mature. The primary development framework is ESP-IDF, Espressif’s official IoT Development Framework, which has supported the C6 since version 5.1. This framework provides a comprehensive set of libraries for Wi-Fi, Bluetooth, and peripheral control, built on the FreeRTOS real-time operating system. For those preferring higher-level languages, the Arduino core supports the ESP32-C6, allowing developers to use the familiar setup and loop structure. MicroPython is also available, enabling rapid prototyping with Python scripts directly on the chip. Additionally, the chip is supported by Zephyr RTOS and the Rust programming language via the esp-hal project, which includes support for programming the low-power core. A convenient feature for developers is the integrated USB Serial/JTAG controller. By connecting a USB cable to the development board, users can flash code, view serial logs, and debug using GDB without needing a separate USB-to-serial converter chip. However, it is critical to note that this USB interface is strictly for device-side debugging and console access; it does not support USB On-The-Go or host modes, meaning the ESP32-C6 cannot act as a USB host to connect keyboards or flash drives.

Despite its capabilities, the ESP32-C6 comes with certain limitations and considerations that developers must address. The chip has undergone several revisions, and Espressif maintains a detailed errata document that lists known issues specific to each silicon version. It is imperative to consult this document before finalizing a hardware design, as some features may behave differently or be unsupported in earlier revisions. Furthermore, the boot process relies on specific strapping pins, such as GPIO8 and GPIO9, which must be held at the correct logic levels during reset to enter download mode or normal execution. Incorrect wiring of these pins can prevent the chip from booting. While the ESP32-C6 is a powerful tool for connected devices, its single-core architecture means that heavy computational tasks or complex user interfaces might require careful optimization or offloading to external processors. Nevertheless, with its combination of tri-radio connectivity, low-power dual-core architecture, and strong community support, the ESP32-C6 stands as a compelling choice for building efficient, modern IoT products, from smart home sensors to industrial monitoring nodes.

Overview of the Espressif Systems ESP32-C6 module, showing the chip and associated components.Image officielle Espressif Systems

ESP-WROOM-32 module, an example of a Wi-Fi and Bluetooth module based on the ESP32 chip family.Wikipedia — ESP32, CC BY-SA 4.0

Functional prototype integrating an SH1106 display and power measurement components, based on an ESP32 microcontroller.Wikipedia — ESP32, CC0

Pinout diagram

Forum (1 topic) →

Specs History Pros / Cons Experts Projects Resources Links Warnings Tutorials Code

Attr	Specs	verified
`main_cpu`	single 32-bit RISC-V HP core, RV32IMAC, four-stage pipeline, up to 160 MHz; CoreMark 496.66 (3.10 CoreMark/MHz at 160 MHz) (datasheet Product Overview:	✔
`co_processor`	low-power (LP) 32-bit RISC-V core, RV32IMAC, two-stage pipeline, up to 20 MHz; stays powered in deep-sleep (datasheet §LP RISC-V). Programmable via esp-lp-hal (	✔
`gpu`	none.	? unverified
`memory`	512 KB HP SRAM, 16 KB LP SRAM, 320 KB ROM, 32 KB L1 cache, 4096-bit eFuse (≤1792 bits user) (datasheet Feature List).	? unverified
`storage`	no in-package flash on the base ESP32-C6 (external SPI/QSPI flash via SPI0/1); FH4/FH8 have 4/8 MB in-package; modules ship 4–16 MB. No PSRAM interface listed in the C6 datasheet (the C61 derivative adds PSRAM per CNX above).	? unverified
`wi_fi`	2.4 GHz only (2412–2484 MHz), 1T1R. Wi-Fi 6 (802.11ax) HE20 mode, up to 150 Mbps PHY, uplink+downlink OFDMA, downlink MU-MIMO, Target Wake Time (TWT) requester; backward 802.11b/g/n with 20/40 MHz bandwidth, MCS0–7; TX power up to +19.5 dBm (ax) (datasheet Wi-Fi Feature List; product page).	? unverified
`bluetooth`	Bluetooth 5 (LE) only — no Bluetooth Classic; Coded PHY long range, advertising extensions, 2 Mbps PHY; RX sensitivity down to −106 dBm @125 kbps (datasheet; product page).	? unverified
`802_15_4`	IEEE 802.15.4 radio for Zigbee 3.0 and Thread 1.3; Wi-Fi/BLE/802.15.4 coexist and share one antenna (datasheet Product Overview).	? unverified
`usb`	USB 2.0 full speed (12 Mbit/s) via the USB Serial/JTAG controller on GPIO12/13 — CDC console + flashing + JTAG debug. It is a device-side debug/console interface, not USB-OTG (see Problems) (datasheet Feature List; TRM has a single USB chapter, "Chapter 32 USB Serial/JTAG Controller":	✔
`gpio`	30 GPIOs on QFN40, 22 on QFN32; 5 strapping GPIOs; 6 GPIOs consumed when the flash is off-package (GPIO24/25/26/28/29/30 recommended for SPI0/1 flash) (datasheet §2.3.4). Strapping pins: GPIO5, GPIO8, GPIO9, GPIO15; boot-mode straps are GPIO8+GPIO9 (datasheet §3). GPIO12/13 = USB, GPIO4–7 = JTAG, GPIO16/17 = UART0, GPIO27 = VDD_SPI (datasheet §2.3.4 notes).	? unverified
`logic_level`	3.0–3.6 V (VDDPST/VDD_SPI recommended 3.3 V); not 5 V tolerant (datasheet §2.5 Power Supply).	? unverified
`peripherals`	2× UART + LP UART, 2× I2C (1 HP + 1 LP), general-purpose SPI (plus 2 flash ports), 1× I2S, LED PWM 6 channels, MCPWM (motor), 2× TWAI® (CAN 2.0), RMT TX/RX, PARLIO, PCNT, SDIO slave, USB Serial/JTAG, event task matrix (ETM), GDMA, 52-bit system timer, 2× 54-bit general-purpose timers, watchdogs, RISC-V trace encoder (datasheet Feature List; ESP-IDF soc_caps:	✔
`analog`	12-bit SAR ADC, up to 7 channels; on-chip temperature sensor; no DAC and no Hall sensor listed (datasheet §4.2.2 Analog Signal Processing).	? unverified
`power`	four modes (Active / Modem-sleep / Light-sleep / Deep-sleep); Deep-sleep ≈ 7 µA with LP SRAM retained (datasheet Power Management); 40 nm process (ESP-IDF Get Started:	✔
`temperature`	−40 ∼ 105 °C ambient, all orderable variants (datasheet Table 1-1).	? unverified

Manufacturer: Espressif Systems (Shanghai) — product page
Year: announced 2021 (CNX Software's June 2022 ESP32-C5 article refers to the ESP32-C6 as announced "last year": Datasheet v1.0 ("official release … products in mass production") is dated 2023-07-25 (datasheet Revision History, v1.5). >
Status: Active — datasheet at v1.5 (2026-03-31), product page live at retrieval time at ≈ US$2/module in 2026 ( C6 modules/bare boards retail in the same low-dollar class.
Chip variants (datasheet Table 1-1): ESP32-C6 (QFN40 5×5 mm, external flash), ESP32-C6FH4 (QFN32, 4 MB in-package Quad SPI flash), ESP32-C6FH8 (QFN32, 8 MB in-package flash; added in datasheet v1.2, 2024-08-23). Chip revisions v0.0/v0.1/v0.2. All rated −40 ∼ 105 °C ambient (
Modules: ESP32-C6-MINI-1/-1U ( ESP32-C6-WROOM-1/-1U with 8 MB SPI flash on DevKitC-1 (
Common boards: ESP32-C6-DevKitC-1, ESP32-C6-DevKitM-1 ( Waveshare ESP32-C6-Zero(-B), Seeed XIAO ESP32C6, Olimex ESP32-C6-DevKit-Lipo, ESPHome C6 Board (Apollo Automation kit), M5Stack and LILYGO P4+C6 combos (community boards via CNX:

＋ Strengths

First Espressif tri-radio SoC: Wi-Fi 6 (802.11ax) + Bluetooth 5 LE + 802.15.4 (Zigbee/Thread) in one 40 nm chip — the product page sells exactly this combination (
Wi-Fi 6 TWT for battery devices: "Target Wake Time … enables customers to build battery-operated connected devices that can last for years" (product page); datasheet quantifies 7 µA deep-sleep.
Thread/Zigbee out of the box: modules are certified for Zigbee 3.0 / Thread 1.3 stacks (devkit page module description: combined with Wi-Fi it is Espressif's reference Matter end-point chip (product page "Enabling Matter").
Entry-level positioning: the ESP32 family is the successor of the ESP8266 ( and the C-series (C2/C3/C6/C61) is its cost-optimized RISC-V branch — CNX describes the C61 as "a low-cost variant of the ESP32-C6" (URL in Identity). Calling the C6 the "spiritual successor to the ESP8266" is positioning, not an Espressif quote.
Security hardware: RSA digital signature, AES, HMAC, SHA, ECC, RNG, secure boot with permission control, flash encryption, eFuse key purpose fields (datasheet Feature List; product page "Security" incl. Trusted Execution Environment).
LP RISC-V core + LP peripherals (LP UART, LP I2C): sensor-polling workloads run while the HP core and most RAM are powered down (datasheet §LP Core; soc_caps SOC_LP_CORE_SUPPORTED).
USB Serial/JTAG built in: one USB-C port gives console, flashing and GDB without an external bridge chip (datasheet; DevKitC-1 user guide).
RISC-V trace encoder for real-time instruction tracing (datasheet block diagram; soc_caps SOC_RISCV_TRACE_SUPPORTED).

− Weaknesses

Errata exist per chip revision: the datasheet repeatedly defers to the official "ESP32-C6 Series SoC Errata" document (e.g. an 802.11ax feature "not supported in some chip revisions"); check it before silicon bring-up (
No USB-OTG — a widespread misconception. The C6's USB is the USB Serial/JTAG device controller only: the 1394-page TRM contains no OTG/host chapter (URL in SoC section), ESP-IDF's C6 soc_caps.h defines SOC_USB_SERIAL_JTAG_SUPPORTED but no SOC_USB_OTG_SUPPORTED (URL in SoC section). USB HID-device projects copied from ESP32-S2/S3 will not port (
No Hall sensor (unlike the original ESP32): the C6's analog list is SAR ADC + temperature sensor only (datasheet §4.2.2). Ported ESP32 hall-rotation-sensor code has no C6 equivalent.
"Wi-Fi 6" is entry-level Wi-Fi 6: 2.4 GHz band only, 20 MHz (HE20), 1T1R, ≤150 Mbps PHY (datasheet Wi-Fi Feature List). No 5 GHz, no 80/160 MHz — don't spec it as a Wi-Fi-6 AP-class part.
Strapping pins GPIO5/8/9/15: GPIO9 is the BOOT button, GPIO8 controls ROM message printing/GPIO drive strength, GPIO15 selects JTAG signal source; wrong levels at reset = won't boot or won't flash (datasheet §3 Boot Configurations).
GPIO24/25/26/28/29/30 conflict with flash on QFN40 designs with off-package SPI flash — reserved as the SPI0/1 interface (datasheet §2.3.4). GPIO12/13 disappear from the GPIO pool once USB Serial/JTAG is used; note the datasheet warning that when USB is disabled GPIO13's internal weak pull-up is off at reset.
Single-core, BLE-only: no Bluetooth Classic and no second core for background housekeeping; ports from dual-core ESP32/S3 code need rework (product page family comparison).
Chip revisions v0.0/v0.1/v0.2: ESP-IDF release ↔ chip-revision compatibility is tracked separately — build with an IDF version matching your silicon (
ADC is small: 12-bit SAR with up to 7 channels (datasheet §4.2.2.1) — plan analog inputs early on QFN32 boards.
Community reports (brownouts on cheap clones, RF layout issues) follow the usual ESP32 patterns; use the C6 forum section: >

Retour d'expérience expert expert — expert-microcontroleur
- Petit retour d'experience sur l'ESP32-C6 après quelques semaines de prototypage. Le point fort est clairement la tri-radio (Wi-Fi 6 2.4G, BLE 5, 802.15.4) sur un seul SoC RISC-V, mais attention au marketing : le Wi-Fi 6 est strictement limite a la bande 2.4 GHz en 20 MHz (HE20), donc ne comptez pas… — expert-microcontroleur
- Merci pour ce rappel sur l'USB, j'ai perdu deux jours a comprendre pourquoi mon projet de clavier ne passait pas alors que le code marchait sur mon ancien module. Par contre, tu mentionnes la limitation a 150 Mbps, est-ce que ca impacte vraiment la latence pour de la domotique connectee ? Je n'ai p… — maker-bidouilleur
- Pour la latence, en 2.4 GHz seul avec OFDMA, c'est très correct pour de la telemetrie, mais ne cherchez pas la performance d'un routeur. Concernant l'IDF, oui, c'est crucial : la compatibilite est suivie separement. Si vous avez une puce v0.2, assurez-vous d'utiliser une release recente qui la supp… — proto-quickstart

Community feedback and projects

ESP32-C6 super mini which board to select on IDE forum.arduino.cc
Arduino forum thread on picking the right board definition for an ESP32-C6 SuperMini in the IDE.
Zigbee (ESP32-C6): Handling congestion with sleepy end devices forum.arduino.cc
Arduino forum thread on handling Zigbee congestion with multiple sleepy end devices on the ESP32-C6.
First ESP32-C6 based board - USB problems electronics.stackexchange.com
Q&A thread about USB problems on a first custom ESP32-C6 based board design.
ESP32-C6 power consumption: Arduino vs Zephyr vs ESP-IDF comparison qoitech.com
Qoitech blog post measuring and comparing ESP32-C6 power consumption across Arduino, Zephyr and ESP-IDF.

ESP32-C6-DevKitC-1 official user guide
ESP32-C6-DevKitC-1 official user guide — (dual USB-C, current-measurement jumpers): .espressif.com/projects/esp-dev-kits/en/latest/esp32c6/esp32-c6-devkitc-1/index.html (unverified au 2026-10-13)
esp-matter
esp-matter — Matter-over-Wi-Fi and Matter-over-Thread end-points on C6: .com/espressif/esp-matter (unverified au 2026-10-13) esp-thread-br — Thread Border Router (reference: Linux + C6, or ESP32-S3 + C6): .com/espressif/esp-thread-br (unverified au 2026-10-13…
Official ESPHome starter kit
Official ESPHome starter kit — on an ESPHome C6 Board (ESP32-C6-MINI-1): .cnx-software.com/2026-08-12/apollo-automation-official-esphome-starter-kit-with-esp32-c6-board-four-fpc-modules/ (unverified au 2026-10-13) Seeed XIAO ESP32C6 2-channel AC energy meter …
Octopus Energy Mini
Octopus Energy Mini — a mass-market real-time energy monitor built on the ESP32-C6 (listed in the Wikipedia ESP32 article: .wikipedia.org/wiki/ESP32) (unverified au 2026-10-13)

esp32-c6_datasheet_en.pdf datasheet
esp32-c6-mini-1_datasheet_en.pdf datasheet
esp32-c6-wroom-1_wroom-1u_datasheet_en.pdf datasheet
esp32-c6_technical_reference_manual_en.pdf manual

Errata exist per chip revision: the datasheet repeatedly defers to the official "ESP32-C6 Series SoC Errata" document (e.g. an 802.11ax feature "not supported in some chip revisions"); check it before silicon bring-up (
No USB-OTG — a widespread misconception. The C6's USB is the USB Serial/JTAG device controller only: the 1394-page TRM contains no OTG/host chapter (URL in SoC section), ESP-IDF's C6 soc_caps.h defines SOC_USB_SERIAL_JTAG_SUPPORTED but no SOC_USB_OTG_SUPPORTED (URL in SoC section). USB HID-device projects copied from ESP32-S2/S3 will not port (
No Hall sensor (unlike the original ESP32): the C6's analog list is SAR ADC + temperature sensor only (datasheet §4.2.2). Ported ESP32 hall-rotation-sensor code has no C6 equivalent.
"Wi-Fi 6" is entry-level Wi-Fi 6: 2.4 GHz band only, 20 MHz (HE20), 1T1R, ≤150 Mbps PHY (datasheet Wi-Fi Feature List). No 5 GHz, no 80/160 MHz — don't spec it as a Wi-Fi-6 AP-class part.
Strapping pins GPIO5/8/9/15: GPIO9 is the BOOT button, GPIO8 controls ROM message printing/GPIO drive strength, GPIO15 selects JTAG signal source; wrong levels at reset = won't boot or won't flash (datasheet §3 Boot Configurations).
GPIO24/25/26/28/29/30 conflict with flash on QFN40 designs with off-package SPI flash — reserved as the SPI0/1 interface (datasheet §2.3.4). GPIO12/13 disappear from the GPIO pool once USB Serial/JTAG is used; note the datasheet warning that when USB is disabled GPIO13's internal weak pull-up is off at reset.
Single-core, BLE-only: no Bluetooth Classic and no second core for background housekeeping; ports from dual-core ESP32/S3 code need rework (product page family comparison).
Chip revisions v0.0/v0.1/v0.2: ESP-IDF release ↔ chip-revision compatibility is tracked separately — build with an IDF version matching your silicon (
ADC is small: 12-bit SAR with up to 7 channels (datasheet §4.2.2.1) — plan analog inputs early on QFN32 boards.
Community reports (brownouts on cheap clones, RF layout issues) follow the usual ESP32 patterns; use the C6 forum section: >

Faire clignoter la LED RGB de la DevKitC-1 debutant Schéma : IMG-esp32-c6-debutant-1-c6-clignoter-rgb-gpio8.svg — Carte ESP32-C6-DevKitC-1 avec la ligne de données de la LED RGB adressable reliée à GPIO8 et le câble USB-C.
Console et flash par USB natif (USB Serial/JTAG) debutant Schéma : IMG-esp32-c6-debutant-2-c6-usb-serial-jtag-console.svg — Contrôleur USB Serial/JTAG du C6 connecté aux broches GPIO12 (D−) et GPIO13 (D+) vers un port USB-C, avec les boutons BOOT (GPIO9) et RESET.
Première connexion Wi-Fi en MicroPython debutant Schéma : IMG-esp32-c6-debutant-3-c6-wifi-micropython.svg — ESP32-C6 relié par une onde 2,4 GHz à une box Wi-Fi, avec invite de commande MicroPython et adresse IP affichée.
Station Wi-Fi 6 sous ESP-IDF : ce que 802.11ax veut dire ici intermediaire Schéma : IMG-esp32-c6-intermediaire-1-c6-wifi6-station-esp-idf.svg — Chaîne d'initialisation Wi-Fi ESP-IDF : NVS, netif, event loop, esp_wifi_start, puis événement IP obtenue, avec badge 2,4 GHz HE20.
BLE 5 et Wi-Fi en simultané : la coexistence tri-radio intermediaire Schéma : IMG-esp32-c6-intermediaire-2-c6-ble5-coexistence-wifi.svg — Trois radios (Wi-Fi 6, BLE 5, 802.15.4) d'un même SoC C6 convergeant vers une antenne unique partagée sur la bande 2,4 GHz.
Deep-sleep 7 µA et réveil minuterie sur batterie intermediaire Schéma : IMG-esp32-c6-intermediaire-3-c6-deep-sleep-7ua.svg — Courbe de consommation d'un cycle réveil/lecture capteur/profondeur sur batterie, avec le plancher de deep-sleep annoté 7 µA et le capteur de température interne.
Zigbee 3.0 et Thread 1.3 sur le radio 802.15.4 avance Schéma : IMG-esp32-c6-avance-1-c6-zigbee-thread-802154.svg — Réseau maillé Thread/Zigbee de trois nœuds C6 reliés à un routeur frontière connecté à un réseau IP.
Endpoint Matter sur C6 : Wi-Fi ou Thread au choix avance Schéma : IMG-esp32-c6-avance-2-c6-matter-endpoint.svg — Endpoint Matter C6 commissionné par BLE puis rattaché soit au réseau Wi-Fi 6 2,4 GHz soit au réseau Thread, avec un contrôleur domotique.
Programmer le cœur LP : le coprocesseur qui ne dort jamais avance Schéma : IMG-esp32-c6-avance-3-c6-lp-core-coprocesseur.svg — Deux cœurs RISC-V du C6 : cœur HP 160 MHz alimenté par un interrupteur d'alimentation, cœur LP 20 MHz relié à LP UART, LP I2C et 16 KB de LP SRAM, toujours alimenté en deep-sleep.

Code library — examples written for this board

clignotante.ino Arduino
The board's sanity check: the LED blinks at 1 Hz using millis() instead of delay(), leaving the loop free for Wi-Fi or sensors. The monitor also prints free heap — handy before adding radio libraries.
bouton-led.ino Arduino
A button between GPIO4 and GND, pulled up internally: every clean press is counted and printed. The 40 ms debounce filter kills the mechanical bounce that would otherwise double-count.
respiration.ino Arduino
The hardware PWM (LEDC) generates the carrier by itself: analogWrite applies a 0-255 duty cycle and the LED breathes without burning CPU time. The chosen frequency avoids PWM whine.
dht22.ino Arduino
The DHT22 delivers temperature and humidity over a single wire: the Adafruit library decodes the 40-bit frames and the sketch adds the dew point. The 2 s cadence is the sensor's hard limit.
oled-i2c.ino Arduino
The SSD1306 OLED is the universal I2C display: two wires, no proprietary library. The sketch writes a framebuffer then pushes it with a single display() — the right discipline against flicker.
serveur-web.ino Arduino
The connected classic: the board serves an HTML page on the local network, two links toggle the LED, and an ADC shows live. No external infrastructure — the server runs inside the board.
ble-compteur.ino Arduino
The board becomes a BLE peripheral: a custom service exposes a press counter that a phone (nRF Connect) reads and follows by notifications. The simplest radio scenario without an access point.
servo.ino Arduino
The absolute mechanics standard: an MG90/SG90 servo sweeps 0-180° driven by 50 Hz PWM. On ESP32 the Servo library rides on LEDC, so almost any pin works.
sommeil-profond.ino Arduino
In deep sleep the SoC draws a few microamps: wake by the minute or by button, and a battery lasts months. RTC_NOINIT_ATTR keeps the wake counter across the reset.
mesures.py MicroPython
MicroPython runs on all these boards: no toolchain, edit main.py and go. This DHT logger writes line-by-line JSON to a file — the format every downstream tool swallows.

Examples and repos found online

espressif/esp-idf github.com
Official Espressif IoT Development Framework: hundreds of C example projects for ESP32, S2/S3, C3/C6 and H2 chips.
espressif/esp-thread-br github.com
Official Espressif Thread border router project in C for ESP32-C6 and OpenThread border routers.
espressif/esp-matter github.com
Official Espressif Matter SDK with example applications in C for ESP32, ESP32-S3, ESP32-C3 and ESP32-C6.